The present invention relates to a low-pass filter and specifically to a technique of a low-pass filter suitable for use as a loop filter in a feedback system, such as a phase locked loop circuit, a delay locked loop, or the like.
In currently-existing semiconductor integrated circuit systems, a feedback system, especially a phase locked loop circuit (hereinafter, referred to as “PLL”), is one of the indispensable components and is incorporated in almost all the LSI devices. The applications of the feedback system range over various technological fields, such as communication devices, microprocessors, IC cards, etc.
FIG. 14 shows the structure of a general charge pump type PLL. General features of the PLL are described with reference to FIG. 14. A phase comparator 10 compares input clock CKin which is supplied to the PLL and feed back clock CKdiv and outputs up signal UP and down signal DN according to the phase difference between the compared clocks. A charge pump circuit 20 outputs (releases or sucks) electric current Ip based on up signal UP and down signal DN. A loop filter 30 smoothes electric current Ip and outputs voltage Vout as a result of the smoothing of electric current Ip. A voltage controlled oscillator 40 changes the frequency of output clock CKout of the PLL based on voltage Vout. A frequency divider 50 divides output clock CKout by N, and a resultant clock is fed back as feedback clock CKdiv to the phase comparator 10. By repeating the above operation, output clock CKout gradually converges on a predetermined frequency and is locked.
The loop filter 30 is an especially significant component among the above components of the PLL. It can be said that the response characteristic of the PLL is determined according to the filter characteristics of the loop filter 30.
FIGS. 15A and 15B show general loop filters. FIG. 15A shows a passive filter. FIG. 15B shows an active filter. These filters are equivalently replaceable with each other and have the same transfer characteristic. As seen from FIGS. 15A and 15B, the loop filter 30 is substantially a low-pass filter formed by a combination of a resistive element and a capacitive element irrespective of whether it is a passive filter or an active filter.
According to the control theory for PLLs, the response bandwidth of the PLL is preferably about a 1/10 of the frequency of the input clock at the maximum. If this theory is followed, in a PLL which receives a reference clock having a relatively low frequency, it is necessary to reduce the cutoff frequency of the loop filter such that the response bandwidth is narrowed. Thus, a loop filter in a conventional PLL has a relatively large time constant, i.e., a large CR product. In general, a larger capacitive element is used in order to achieve a larger CR product.
However, increasing the size of the capacitive element causes an increase in the circuit size. This is a serious problem especially in a semiconductor integrated circuit including a large number of PLLs, such as a microprocessor, or the like. Further, especially in an IC card, it should be avoided, in view of reliability, to incorporate an element thicker than the card. The countermeasure of externally providing a large capacitive element is substantially impossible. Conventionally, the following means have been provided for the purpose of decreasing the size of the capacitive element of the loop filter.
In the first countermeasure example, a loop filter is structured such that a capacitive element and a resistive element, which would generally be connected in series, are separated, and separate electric currents are supplied to these elements. The voltages generated in the elements are added together in an adder circuit, and a resultant voltage is output from the adder circuit (see, for example, the specification of Japanese Patent No. 2778421 (page 3 and FIG. 1)). According to this loop filter, the electric current supplied to the capacitive element is smaller than that supplied to the resistive element, whereby the filter characteristics equivalent to those of a conventional filter are maintained, and the size of the capacitive element is relatively decreased.
The second countermeasure example is a loop filter disclosed in a patent application by the first inventor of the present application (Japanese Patent Application No 2003-121647: hereinafter, referred to as “prior application”). FIG. 16 shows an example of the loop filter disclosed in the prior application. This loop filter receives two lines of electric currents which are obtained by interiorly dividing electric current Ip with a predetermined ratio. Specifically, the loop filter receives electric current Ip/10 and electric current 9Ip/10 at input terminals IN1 and IN2, respectively. Then, the voltage generated between the capacitive element 31 and the resistive element 32 is output. With such a structure, the size of the capacitive element 31 is largely reduced while maintaining the transfer characteristic equivalent to that of the passive filter shown in FIG. 15A.
However, in the first example, it is necessary to provide the adder circuit even when a passive loop filter is structured. Accordingly, the circuit area increases, and the complexity of the circuit also increases. In the second example, the adder circuit is not necessary, and therefore, none of the circuit area and the circuit complexity increases. However, the potential at input terminal IN2 becomes very close to the ground potential, which may cause various problems.
If the potential at input terminal IN2 becomes close to the ground potential, a MOS transistor (not shown) for controlling the supply/stop of the electric current flowing into input terminal IN2 does not stably operate. As a result, it becomes impossible to precisely supply a constant current to input terminal IN2, and there is a possibility that the operation of the low-pass filter becomes unstable.
Furthermore, when the potential at input terminal IN2 becomes close to the ground potential, the voltage applied between the ends of the capacitive element 33 becomes extremely small, and therefore, it becomes difficult to use a MOS capacitor for the capacitive element 33. If a voltage equal to or higher than a threshold voltage is not applied to the MOS capacitor, the capacitance value of the MOS capacitor decreases, and the MOS capacitor may not function as a capacitor.
Today, a PLL is frequently used in various digital circuits, but in many cases, a manufacturing process of a digital circuit does not include a capacitor process. Thus, under the restriction that a capacitive element cannot be externally provided, a capacitive element in a loop filter of a PLL is structured using a MOS capacitor. However, as described above, in the case of a loop filter disclosed in the prior application, it is difficult to use the MOS capacitor for the capacitive element 33. Thus, the capacitive element 33 is formed by using, for example, a capacitance between wires, or the like, which causes an increase in the circuit area.